This present invention relates to polishing pads used in during chemical mechanical polishing and methods and apparatus for monitoring a polishing process.
An integrated circuit is typically formed on a substrate by the sequential deposition of conductive, semiconductive or insulative layers on a silicon wafer. One fabrication step involves depositing a filler layer over a non-planar surface, and planarizing the filler layer until the non-planar surface is exposed. For example, a conductive filler layer can be deposited on a patterned insulative layer to fill the trenches or holes in the insulative layer. The filler layer is then polished until the raised pattern of the insulative layer is exposed. After planarization, the portions of the conductive layer remaining between the raised pattern of the insulative layer form vias, plugs and lines that provide conductive paths between thin film circuits on the substrate. In addition, planarization is needed to planarize the substrate surface for photolithography.
Chemical mechanical polishing (CMP) is one accepted method of planarization. This planarization method typically requires that the substrate be mounted on a carrier or polishing head. The exposed surface of the substrate is placed against a rotating polishing disk pad or belt pad. The polishing pad can be either a “standard” pad or a fixed-abrasive pad. A standard pad has a durable roughened surface, whereas a fixed-abrasive pad has abrasive particles held in a containment media. The carrier head provides a controllable load on the substrate to push it against the polishing pad. A polishing slurry, including at least one chemically-reactive agent, and abrasive particles if a standard pad is used, is supplied to the surface of the polishing pad.
One problem in CMP is determining whether the polishing process is complete, i.e., whether a substrate layer has been planarized to a desired flatness or thickness, or when a desired amount of material has been removed. Overpolishing (removing too much) of a conductive layer or film leads to increased circuit resistance. On the other hand, under-polishing (removing too little) of a conductive layer leads to electrical shorting. Variations in the initial thickness of the substrate layer, the slurry composition, the polishing pad condition, the relative speed between the polishing pad and the substrate, and the load on the substrate can cause variations in the material removal rate. These variations cause variations in the time needed to reach the polishing endpoint. Therefore, the polishing endpoint cannot be determined merely as a function of polishing time.
One way to determine the polishing endpoint is to monitor polishing of the substrate in-situ, e.g., with optical or electrical sensors. One monitoring technique is to induce an eddy current in the metal layer with a magnetic field, and detect changes in the magnetic flux as the metal layer is removed. In brief, the magnetic flux generated by the eddy current is in opposite direction to the excitation flux lines. This magnetic flux is proportional to the eddy current, which is proportional to the resistance of the metal layer, which is proportional to the layer thickness. Thus, a change in the metal layer thickness results in a change in the flux produced by the eddy current. This change in flux induces a change in current in the primary coil, which can be measured as change in impedance. Consequently, a change in coil impedance reflects a change in the metal layer thickness.